Qianheyibang Develops World's First 4-Layer 3D DRAM Processing-in-Memory Chip
Qianheyibang announced the successful first silicon bring-up of the world's first 4-layer 3D DRAM Processing-in-Memory chip, which adopts a self-developed 3D integrated native computing architecture to break through the traditional memory wall bottleneck.
The chip released by Qianheyibang this time achieves the world's first 4-layer DRAM vertical high-density integration. Through a "4+1" 3D stacking architecture, it deeply integrates computation and storage in 3D space, changing the design paradigm of traditional chips from a physical structure perspective.
In traditional architectures, the separation of computation and storage leads to high data movement energy consumption and latency, forming a "memory wall" that constrains computing power. Processing-in-Memory technology significantly improves energy efficiency by shortening data movement distance, which is crucial for high-load AI large model training and inference.
The chip has moved from technical verification to the engineering implementation stage, meaning the Processing-in-Memory architecture has made key progress in commercialization. This may drive AI computing hardware to evolve towards higher energy efficiency and lower costs, providing new hardware choices for edge AI and data centers.
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